Glass Micromachining with Sputtered Silicon as a Masking Layer
Само за регистроване кориснике
2014
Конференцијски прилог (Објављена верзија)
Метаподаци
Приказ свих података о документуАпстракт
In this work we present the not so commonly use of RF sputtered silicon as a masking layer for glass wet etching. The main advantages of this technique are low deposition temperature of silicon layer compared to PECVD and LPCVD processes, simplicity to use and low cost. Si layers were sputtered on 2.5x2.5cm(2) Pyrex 7740 substrates. The measured thickness of deposited silicon layer was 2.2 mu m. Silicon layer was patterned using lift-off technique. Etching was done in undilluted HF (49%) with estimated etch rate of similar to 8 mu m/min. Good quality of the glass surface without pinholes and notch defects on the glass etched edges suggests that using sp-Si layer as a masking material for glass etching is feasible.
Извор:
Proceedings of the International Conference on Microelectronics, ICM, 2014, 175-178Издавач:
- Institute of Electrical and Electronics Engineers Inc.
DOI: 10.1109/MIEL.2014.6842114
ISSN: 2159-1660
WoS: 000360788600034
Scopus: 2-s2.0-84904689658
Институција/група
IHTMTY - CONF AU - Lazić, Žarko AU - Smiljanić, Milče AU - Rašljić, Milena PY - 2014 UR - https://cer.ihtm.bg.ac.rs/handle/123456789/1449 AB - In this work we present the not so commonly use of RF sputtered silicon as a masking layer for glass wet etching. The main advantages of this technique are low deposition temperature of silicon layer compared to PECVD and LPCVD processes, simplicity to use and low cost. Si layers were sputtered on 2.5x2.5cm(2) Pyrex 7740 substrates. The measured thickness of deposited silicon layer was 2.2 mu m. Silicon layer was patterned using lift-off technique. Etching was done in undilluted HF (49%) with estimated etch rate of similar to 8 mu m/min. Good quality of the glass surface without pinholes and notch defects on the glass etched edges suggests that using sp-Si layer as a masking material for glass etching is feasible. PB - Institute of Electrical and Electronics Engineers Inc. C3 - Proceedings of the International Conference on Microelectronics, ICM T1 - Glass Micromachining with Sputtered Silicon as a Masking Layer SP - 175 EP - 178 DO - 10.1109/MIEL.2014.6842114 ER -
@conference{ author = "Lazić, Žarko and Smiljanić, Milče and Rašljić, Milena", year = "2014", abstract = "In this work we present the not so commonly use of RF sputtered silicon as a masking layer for glass wet etching. The main advantages of this technique are low deposition temperature of silicon layer compared to PECVD and LPCVD processes, simplicity to use and low cost. Si layers were sputtered on 2.5x2.5cm(2) Pyrex 7740 substrates. The measured thickness of deposited silicon layer was 2.2 mu m. Silicon layer was patterned using lift-off technique. Etching was done in undilluted HF (49%) with estimated etch rate of similar to 8 mu m/min. Good quality of the glass surface without pinholes and notch defects on the glass etched edges suggests that using sp-Si layer as a masking material for glass etching is feasible.", publisher = "Institute of Electrical and Electronics Engineers Inc.", journal = "Proceedings of the International Conference on Microelectronics, ICM", title = "Glass Micromachining with Sputtered Silicon as a Masking Layer", pages = "175-178", doi = "10.1109/MIEL.2014.6842114" }
Lazić, Ž., Smiljanić, M.,& Rašljić, M.. (2014). Glass Micromachining with Sputtered Silicon as a Masking Layer. in Proceedings of the International Conference on Microelectronics, ICM Institute of Electrical and Electronics Engineers Inc.., 175-178. https://doi.org/10.1109/MIEL.2014.6842114
Lazić Ž, Smiljanić M, Rašljić M. Glass Micromachining with Sputtered Silicon as a Masking Layer. in Proceedings of the International Conference on Microelectronics, ICM. 2014;:175-178. doi:10.1109/MIEL.2014.6842114 .
Lazić, Žarko, Smiljanić, Milče, Rašljić, Milena, "Glass Micromachining with Sputtered Silicon as a Masking Layer" in Proceedings of the International Conference on Microelectronics, ICM (2014):175-178, https://doi.org/10.1109/MIEL.2014.6842114 . .